Manufacturing, medical diagnostics, energy and environmental protection all employ sensors that measure phenomena by converting it into an analogue signal which is then converted into a number using a ‘digitiser’. The global market for these ‘analogue-to-digital converters’ (ADCs) is anticipated to reach $4.6 billion by 2027.

However, despite widespread use, there are areas where accurate measurements are beyond even the best digitisers currently available, such as power quality, acoustics, and geophysics. For the latter, current digitisers present a bottle neck in capturing full information from seismometers, used for earthquake detection. In smart electricity networks the exact timing of data from multiple sensors is important for grid stability – but there are presently none which can provide perfect synchronisation.
Recent advances in technology have opened the possibility of making a metrology-grade digitiser with enhanced performance, but to do this requires all functional elements of the digitiser, including the ADC itself, the power supply and the timing circuitry, to be optimized.

This project will develop new metrology grade ADC architectures and improved digital models for those that are used to synchronise time signals, such as integrating ADC and Sigma-Delta designs.
New designs will be investigated for operational amplifiers, used to boost APC signals. It will also develop an ultra-quiet, stable, low noise, mains power supply, with negligible interference noise, applicable for all voltage and current spans needed for metrology grade ADC architectures.

The knowledge gained will be shared with less experienced partners, such as CMI, IPQ and FER, allowing them to participate in an anticipated follow on-project with the aim of developing a metrology-grade digitiser for APCs.